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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
* The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT688 8-bit magnitude comparator
Product specification File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specification
8-bit magnitude comparator
FEATURES * Compare two 8-bit words * Output capability: standard * ICC category: MSI GENERAL DESCRIPTION
74HC/HCT688
The 74HC/HCT688 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT688 are 8-bit magnitude comparators. They perform comparison of two 8-bit binary or BCD words. The output provides P = Q.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay Pn, Qn to P = Q E to P = Q CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". where: input capacitance power dissipation capacitance per package notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 17 8 3.5 30 17 12 3.5 30 ns ns pF pF HCT UNIT
December 1990
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Philips Semiconductors
Product specification
8-bit magnitude comparator
PIN DESCRIPTION PIN NO. 1 2, 4, 6, 8, 11, 13, 15, 17 3, 5, 7, 9, 12, 14, 16, 18 10 19 20 SYMBOL E P0 to P7 Q0 to Q7 GND P=Q VCC NAME AND FUNCTION enable input (active LOW) word inputs word inputs ground (0 V) equal to output positive supply voltage
74HC/HCT688
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
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Philips Semiconductors
Product specification
8-bit magnitude comparator
74HC/HCT688
Fig.4 Functional diagram.
Fig.5 Logic diagram.
FUNCTION TABLE INPUTS DATA Pn, Qn P=Q X P>Q PDecember 1990
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Philips Semiconductors
Product specification
8-bit magnitude comparator
DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER min. tPHL/ tPLH propagation delay Pn, Qn to P = Q propagation delay E to P = Q output transition time +25 typ. 55 20 16 28 10 8 19 7 6 max. 170 34 29 120 24 20 75 15 13 -40 to +85 min. max. 215 43 37 150 30 26 95 19 16 -40 to +125 min. max. 255 51 43 180 36 31 110 22 19 ns
74HC/HCT688
TEST CONDITIONS UNIT VCC WAVEFORMS (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Fig.6
tPHL/ tPLH
Fig.7
ns
tTHL/ tTLH
Figs 6 and 7
ns
December 1990
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Philips Semiconductors
Product specification
8-bit magnitude comparator
DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI Note to HCT types
74HC/HCT688
The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT Pn Qn E
UNIT LOAD COEFFICIENT 0.35 0.35 0.70
AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT SYMBOL PARAMETER min. tPHL/ tPLH tPHL/ tPLH tTHL/ tTLH propagation delay Pn, Qn to P = Q propagation delay E to P = Q output transition time +25 typ. 20 18 7 max. 34 24 15 -40 to +85 min. max. 43 30 19 -40 to +125 min. max. 51 36 22 ns ns ns 4.5 4.5 4.5 Fig.6 Fig.7 Figs 6 and 7 UNIT V CC WAVEFORMS (V) TEST CONDITIONS
December 1990
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Philips Semiconductors
Product specification
8-bit magnitude comparator
AC WAVEFORMS
74HC/HCT688
(1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
(1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6
Waveforms showing the enable input (E) to the equal to output (P = Q) propagation delays and the output transition times.
Fig.7
Waveforms showing the word inputs (Pn, Qn) to the equal to output (P = Q) propagation delays and the output transition times.
APPLICATION INFORMATION Two or more "688" 8-bit magnitude comparators may be cascaded to compare binary or BCD numbers of more than 8 bits. An example is shown in Fig.8.
Fig.8 Binary or BCD comparator.
PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines".
December 1990
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